# file "test3"
#
# test file for test procedure
# to verify external clock mode
# chose 40 MHz external clock
clock 40.0e6
# default address used
# 0.0 for dwell time means pause
#       freq          atten    dwell
#         Hz           dB      seconds
start
out	110		0	0.0
out	1110		0	0.0
out	22220		0	0.0
out	333330		0	0.0
out	4444440		0	0.0
out	8888880		0	0.0
out	11111110	0	0.0
out	12000000	0	0.0
stop